MUSIC (Multiple Signal Classification) ALGORITHM as a base of Sub-Space ALGORITHMs is applied in ARRAY processing systems. The error of the ALGORITHM in detection & resolution depends on several parameters, such as snapshots, signal-to-noise ratio and sensor locations. In this paper, the previous dependency is investigated. So, all the scenarios of ARRAY shapes are defended and then i analytic formulas are derived in two bearings of θ and φ We will show which parameters have ithe most effect on the desired error (the error threshold).

Systolic architecture is one of most important parallel processing architectures. In the systolic ARRAY, ALU units are arranged as an ARRAY. This ARRAY acts synchronously and executes the recursive equations in parallel by applying the proper input. In this paper, the systolic ARRAY for the SL0 is designed and simulated. Simulation results showed that the implementation of this ALGORITHM with a single processor, assuming 4 clocks for executing each recursive equation, requires 4N ^ 3 + 9. 7N ^ 2 + 3. 2N + 18 clocks, while doing it with a systolic ARRAY requires 48n + 32 clocks due to parallel computing and pipelines.

In this paper, the problem of scheduling jobs with non-identical sizes has been studied on a single-batch processing machine, in order to minimize the makespan. Using new lower BOUNDs, a branch and BOUND ALGORITHM has been proposed to solve the problem. In this ALGORITHM, two new methods have been used to generate lower BOUNDs and results have been compared with the existing lower BOUND in literature. In order to evaluate the performance of the proposed method, test problems have been randomly generated and branch and BOUND ALGORITHM has been tested with different lower BOUNDs on these cases. Findings indicated that when the size of the jobs is large compared to the capacity of the machine, the branch and BOUND ALGORITHM with the new lower BOUND has the best performance. When the size of the jobs is small compared to the capacity of the machine (up to half the capacity of the machine), the ALGORITHM with existing lower BOUND has better performance. In addition, when the size of the jobs is neither large nor small, the lower BOUNDs provide the best performance. Introduction: Based on predictions, services are a key component of the growth of the global economy in future (Arnold et al. 2011). Acording to Jane and Kumar (2012), services play a critical role in a supply chain. Also, according to Wang et al. (2015), a "product" or "service" must exist in each supply chain which is produced by the upstream sectors and delivered to downstream. Recently due to increasing customer expectations, companies’ competition has been replaced by the supply chains competition and as a result, competition has been increased in the simultaneous supply of products and services. This has led to challenges in integrating companies and in coordinating the materials, information and financial flow that were previously overlooked. Accordingly, a new managerial philosophy has been developed known as Product-Service Supply Chain (PSSC) (Stanley & Wisner, 2002). This study seeks to develop a performance evaluation model for the product-service supply chain in the home appliance industry, which is finally solved using Adaptive Neuro-Fuzzy Inference System (ANFIS). Design/Approach: In this paper, performance evaluation constructs and criteria of service supply chain are identified by reviewing the literature and exploratory and confirmatory factor analysis and then, the performance evaluation of service supply chains in Iran's home appliance industry has been performed using these constructs, criteria and ANFIS. Findings and Discussion: Based on the findings, ten main extracted constructs can be suggested for the performance evaluation of the supply chain. They include "Operational Performance (OP)", "Strategic Performance (SP)", "Financial Performance (FP)", "Performance of Information and Communication Technology (PICT)", “ Return Performance” (REP), “ Risk Performance (RIP)” , “ Logistic Performance (LP)” , “ Market Performance (MP)” , “ Internal Structure Performance (PIS)” and “ Growth and Innovation Performance (PGI)” , among which, the Strategic Performance (SP) and Return Performance (REP) are the most important and the least important constructs, respectively. Conclusions Based on the findings, the following practical recommendations are suggested to the companies: · Enhancing the demand forecasts performance and utilizing more appropriate methods and software to improve forecasts in demand and order management areas. · Improving the return management status by increased attention and more investment in return management processes. · Effective investment in service development management to enhance the R&D services performance. · Utilizing risk management approaches and methods to identify and take preventive actions on the risks in the companies’ service supply chain.

Each channel of the phased ARRAY antenna intrinsically has the phase errors. This is because of the position and orientation error of antenna elements due to assembling tolerance or mechanical distortion, and the electric length error of each RF channel. These errors can decrease the antenna performance, for instance the gain reduction, sidelobe level enhancement, and inaccurate beam direction. In order to improve the performance of the antenna in the presence of phase errors, a phase correction method using Genetic ALGORITHM (GA) is proposed. By using the proposed method, the antenna overall radiation pattern is recovered close to ideal radiation pattern without error. By applying the simulation data to a large ARRAY of 32  40 elements at the frequency of S-band the effectiveness of the proposed method is verified.

The ARRAY factor (sidelobe level, SLL) of a linear ARRAY is optimized using modified continuous genetic ALGORITHMs in this work. The amplitudes and phases of the currents as well as the separation of the antennas are all taken as variables to be controlled. The results of the design using modified GA versions are compared with other methods. Two design problems were studied using several continuous modified GA versions and the results are presented as several plots. As a final example, the design specifications for an ARRAY with 200 elements are given. The effectiveness and advantages of the proposed modified GA versions are outlined.

The evolution of today's application technologies requires a certain level of robustness, reliability and ease of integration. We choose the Fields Programmable Gate ARRAY (FPGA) hardware description language to implement the facial recognition ALGORITHM based on "Eigen faces" using Principal Component Analysis. In this paper, we first present an overview of the PCA used for facial recognition, then use a VHSIC Hardware Description Language (VHDL) simulation and design platform, which is the ISE. We describe the operation of each block and implement, thereafter, the computation of the global centered images. This corresponds to the first step of the PCA ALGORITHM to assess its performance. The comparison of the results of this implementation with that of MATLAB confirmed the operability and effectiveness of this method for centralizing images. We also implemented the last part of this ALGORITHM which is the computation of the Manhattan distance. The tests have given very satisfactory results.

Transportation Discrete Network Design Problem (TDNDP) aims at choosing a subset of proposed projects to minimize the users’ total travel time with respect to budget constraint. Because TDNDP is a hard combinatorial problem, recent research has widely addressed heuristic approaches and ignored the exact solution. This paper is going to explore how application of parallel computation can affect the performance of an exact ALGORITHM in TDNDP. First, we show that the Branch-and-BOUND (B&B) ALGORITHM proposed by LeBlanc is well adapted to a parallel design with synchronized Master-Slave (MS) paradigm. Then we develop a parallel B&B ALGORITHM and implement it with two search strategies of Depth-First-Search (DFS) and Best-First-Search (BFS). Detailed results over up to 16 processing cores are reported and discussed in an illustrative example of the Chicago Sketch network. The results suggest an almost linear speedup for both strategies which slightly drops as more processing cores are added. When using 16 processing cores the speedup values of 11.80 and 12.20 are achieved for DFS and BFS strategies respectively. Furthermore, the BFS strategy reveals a very fast parallel performance by finding the optimal solution via the minimum computational effort.